With the rapid development of technologies such as smartphones, 5G, and the Internet of Things (IoT), the heat dissipation power of chips has risen sharply. At the same time, the demand for ultra-thin device profiles severely limits the space available for thermal management, making chip temperature control extremely challenging. Thermal stress can easily cause wafer warpage in CSP chips, potentially leading to cracking in severe cases.
Due to the small size of mobile phone chips, it is difficult to capture thermal stress during temperature cycling using traditional strain measurement methods. Consequently, Digital Image Correlation (DIC) technology is employed to measure strain, enabling a better analysis of thermal stress distribution—as well as performance characteristics related to electrical conduction, temperature control, and heat dissipation—while the chip is powered on.
The XTOP3D XTDIC strain measurement and analysis system serves as a vital tool for studying chip deformation across varying temperatures. It is particularly well-suited for analyzing thermal stress and stress concentration under load, thereby facilitating a comprehensive assessment of the chip's reliability and stability during operation.
Micro-DIC Experiment on Chip Thermal Expansion
Environmental conditions significantly impact chip reliability. Excessive heat can lead to material softening, reduced structural strength, changes in electrical properties, and even physical damage; overheating can also damage components and increase the surface resistance of metallic materials, preventing the chip from functioning efficiently. Therefore, analyzing the thermal effects on chips is crucial.
The figure below illustrates the strain distribution characteristics of the chip while powered and subjected to heat:
Image acquisition using a microscopic DIC system
Analysis of Chip Deformation Due to Thermal Expansion Upon Power-Up
Strain distribution curve for key regions
Research Scope and Key Aspects:
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The patented algorithm of the microscopic DIC system enables precise measurement of minute deformations and strains in chips under a microscope;
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The system allows for the direct extraction of distribution characteristics in affected zones during thermal fatigue loading via strain maps, serving as a basis for failure assessment;
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Strain analysis data from the system can be directly used to determine the coefficients of thermal expansion (CTE) for different materials;
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It enables direct measurement of strain gradients and the location of failures—such as delamination—caused by the thermal deformation of PCBs;
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High- and Low-Temperature Deformation Testing of Mobile Phone Chips
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Exposure to high or low temperatures has adverse effects on almost all basic materials. For electronic devices, such exposure alters the physical properties of constituent materials, potentially affecting operational performance and causing temporary or permanent damage to mobile phone functionality.
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u Material softening, hardening, and embrittlement
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u Differential shrinkage among different materials
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u Changes in the performance of electronic components (chips, resistors, capacitors)
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u Fracture, cracking, and brittle failure; changes in impact strength and reduction in overall strength
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u Changes in the performance of chips and PCBs
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Testing involves measuring surface strain on chips and PCBs at various temperatures and analyzing the impact on mobile phone performance.
Strain curves at key points throughout the entire temperature variation process
Research Scope and Key Aspects:
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DIC technology enables the measurement of full-field strain on chips, as well as changes in strain distribution during temperature fluctuations.
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DIC strain maps serve as a direct basis for assessing deformation in critical areas and informing material and process selection.
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Strain and strain-rate data obtained via DIC technology can be used to validate finite element analysis (FEA) results.
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Application of the XTOP3D XTDIC system in chip process testing: It directly measures the coefficients of thermal expansion (CTE) for chips and materials. During measurement, the system ensures high precision by combining microscopy with proprietary algorithms developed by XTOP3D. The XTDIC system directly measures thermal deformation effects in chips, silicon wafers, packaging, substrates, and materials. It characterizes the mechanical behavior of chips under various temperatures—including high- and low-temperature testing—by analyzing deformation, strain distribution, and locations of strain concentration.
